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Published Journal

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  1. DG Jeong, E. Park, Y. Jo, E. Yang, G. Noh, DK Lee, MJ Kim, YJ Jeong, HJ Jang, DJ Joe, J. Chang, and JY Kwak, “Grain boundary control for high-reliability HfO2-based RRAM,” Chaos Solitons & Fractals, 183, 2024

  2. Y. Jo, M. Kim, E. Park, G. Noh, GW Hwang, YJ Jeong, J. Kim, J. Park, S. Park, HJ Jang, and JY Kwak, “A study on pattern classifications with MoS2-based CTF synaptic device,” Journal of Alloys and Compounds, 982, 2024

  3. E. Park, DY Woo, G. Noh, Y. Jo, DK Lee, J. Park, J. Kim, YJ Jeong, S. Park, HJ Jang, N. Choi, S. Kim, and JY Kwak, “IGZO charge trap flash device for reconfigurable logic functions,” Applied Physics Letters, 124, 12, 2024

  4. Y. Jo, DY Woo, G. Noh, E. Park, MJ Kim, YW Sung, DK Lee, J. Park, J. Kim, YJ Jeong, S. Lee, I. Kim, JK Park, S. Park, and JY Kwak, “Hardware Implementation of Network Connectivity Relationships Using 2D hBN‐Based Artificial Neuron and Synaptic Devices,” Advanced Functional Materials, 34, 10, 2024

  5. Y. Lee, JH Woo, K. Kim, KS Lee, YJ Jeong, J. Kim, GW Hwang, DK Lee, JY Kim, I. Kim, “Laser‐Assisted Nanotexturing for Flexible Ultrathin Crystalline Si Solar Cells,” Solar RRL, 7, 19, 2023

  6. SW Cho, YW Lee, SH Kim, S. Han, I. Kim, JK Park, JY Kwak, J. Kim, YJ Jeong, GW Hwang, KS Lee, S. Park, and S. Lee, “Reduction of carrier density and enhancement of the bulk Rashba spin-orbit coupling strength in Bi2Te3/GeTe superlattices,” Journal of Alloys and Compounds, 957, 170444, 2023

  7. K. Kim, JG Lim, SM Hu, YJ Jeong, J. Kim, S. Lee, JY Kwak, J. Park, GW Hwang, KS Lee, S. Park, WS Lee, BK Ju, JK Park, and I. Kim, “Multifilamentary switching of Cu/SiOx memristive devices with a Ge-implanted a-Si underlayer for analog synaptic devices,” NPG Asia Materials, 15, 1, 48, 2023

  8. JP Kim, SK Kim, S. Park, S. Kuk, T. Kim, BH Kim, SH Ahn, YH Cho, YeonJoo Jeong, SY Choi, and S. Kim, “Dielectric-Engineered High-Speed, Low-Power, Highly Reliable Charge Trap Flash-Based Synaptic Device for Neuromorphic Computing beyond Inference,” Nano Letters, 2023

  9. J. Park, YeongJoo Jeong, J. Kim, S. Lee, JY Kwak, JK Park, and I. Kim, “High Dynamic Range Digital Neuron Core With Time-Embedded Floating-Point Arithmetic,” IEEE Transactions on Circuits and Systems I: Regular Papers, 2023

  10. J. Kang, T. Yoon, S. Hu, J. Kim, JY Kwak, J. Park, JK Park, I. Kim, S. Lee, S. Kim, and YeonJoo Jeong, "Cluster-type analogue memristor by engineering redox dynamics for high-performance neuromorphic computing," Nature Communications, 13, 4040, 2022

  11. E. Park, JE Seo, G. Noh, Y. Jo, DY Woo, IS Kim, J. Park, J. Kim, YeonJoo Jeong, S. Lee, I. Kim, JK Park, S. Kim, J. Chang, and JY Kwak, “A pentagonal 2D layered PdSe2-based synaptic device with a graphene floating gate,” Journal of Materials Chemistry C, 10, 16536, 2022

  12. J. Lee, SW Cho, YW Lee, JY Kwak, J. Kim, YeonJoo Jeong, GW Hwang, S. Park, SB Kim, and S. Lee, “Rational engineering of a switching material for an Ovonic threshold switching (OTS) device with mitigated electroforming,” Journal of Materials Chemistry C, 10, 18033, 2022

  13. DH Ahn, S. Hu, K. Ko, D. Park, H. Suh, GT Kim, JH Han, JD Song, and YeonJoo Jeong, “Energy-Efficient III–V Tunnel FET-Based Synaptic Device with Enhanced Charge Trapping Ability Utilizing Both Hot Hole and Hot Electron Injections for Analog Neuromorphic Computing,” ACS Applied Materials & Interfaces, 14, 21, 2022

  14. JM Cho, HJ Lee, YJ Ko, HJ Choi, YJ Baik, GW Hwang, JK Park, JY Kwak, J. Kim, J. Park, YeonJoo Jeong, I. Kim, KS Lee, and WS Lee, “Bottom-up evolution of consolidated porous diamond layer by hot-filament-CVD,” Surfaces and Interfaces, 34, 102362, 2022

  15. M. Kim, E. Park, J. Park, J. Kim, YeonJoo Jeong, S. Lee, I. Kim, JK Park, SY Park, and JY Kwak, "A Triple-level cell charge trap flash memory device with CVD-grown MoS2," Results in Physics, 105620, 2022

  16. YJ Ko, JY Kim, WH Lee, MG Kim, TY Seong, J. Park, YeonJoo Jeong, BK Min, WS Lee, DK LEe, and HS Oh, "Exploring dopant effects in stannic oxide nanoparticles for CO2 electro-reduction to formate," Nature Communications, 13, 1, 2022

  17. H. Lee, SW Cho, SJ Kim, J. Lee, KS Kim, I. Kim, JK Park, JY Kwak, J. Kim, J. Park, YeonJoo Jeong, GW Hwang, KS Lee, D. Ielmini, and S. Lee, "Three-Terminal Ovonic Threshold Switch (3T-OTS) with Tunable Threshold Voltage for Versatile Artificial Sensory Neurons," Nano Letters, 2022

  18. S. Hu, J. Kang, T. Kim, S. LEe, JK Park, I. Kim, J. Kim, JY Kwak, J. Park, GT Kim, S. Choi, and YeonJoo Jeong, "SPICE study of STDP characteristics in a drift and diffusive memristor-based synapse for neuromorphic computing," IEEE Access, 10, 2022

  19. Y. Jo, K. Mun, YeonJoo Jeong, JY Kwak, J. Park, S. Lee, I. Kim, JK Park, GW Hwang, and J. Kim, "A Poisson Process Generator Based on Multiple Thermal Noise Amplifiers for Parallel Stochastic Simulation of Biochemical Reactions," Electronics, 11, 7, 2022

  20. JM. Cho, YJ Ko, HJ Lee, HJ Choi, YJ Baik, JK Park, JY Kwak, J. Kim, J. Park, YeonJoo Jeong, I. Kim, KS Lee, and WS Lee, "Bottom-Up Evolution of Diamond-Graphite Hybrid Two-Dimensional Nanostructure: Underlying Picture and Electrochemical Activity," Small, 18, 8, 2105087, 2022

  21. S. Shin, DC Kang, K. Kim, YeonJoo Jeong, J. Kim, S. LEe, JY Kwak, J. Park, GW Hwang, KS Lee, JK Park, J. Li, and I. Kim, "Emulating the short-term plasticity of a biological synapse with a ruthenium complex-based organic mixed ionic-electronic conductor," Materials Advances, 3, 6, 2022

  22. K Kim, DC Kang, YeonJoo Jeong, J Kim, S Lee, JY Kwak, J Park, GW Hwang, KS Lee, BK Ju, JK Park, and I Kim, "Ion beam-assisted solid phase epitaxy of SiGe and its application for analog memristors," Journal of Alloys and Compounds, 884, 161086, 2021

  23. T. Kim, S. Hu, J. Kim, JY Kwak, J. Park, S. Lee, I. Kim, JK Park, and YeonJoo Jeong, " Spiking Neural Network (SNN) with memristor synapses having non-linear weight update," Frontiers in Computational Neuroscience, 15, 22, 2021

  24. S. Yang, J. Shin, T. Kim, K. W. Moon, J. Kim, G. Jang, J. Tang, C. Hwang, YeonJoo Jeong (co-corresponding), and J. P. Hong, "Integrated neuromorphic computing networks by artificial spin synapses and spin neurons," NPG Asia Materials, 13, 1, 2021

  25. M. Kim, E. Park, IS Kim, J. Park, J. Kim, YeonJoo Jeong, S. Lee, I. Kim, JK Park, TY Seong, and JY Kwak, "A Comparison Study on Multilayered Barrier Oxide Structure in Charge Trap Flash for Synaptic Operation," Crystals, 11, 1, 70, 2020

  26. E Park, M Kim, TS Kim, IS Kim, J Park, J Kim, YeonJoo Jeong, S Lee, I Kim, JK Park, GT Kim, J Chang, K Kang, and JY Kwak, "A 2D material-based floating gate device with linear synaptic weight update," Nanoscale, 12, 48, 2020

  27. K Kim, S Park, SM Hu, J Song, W Lim, YeonJoo Jeong, J Kim, S Lee, JY Kwak, J Park, JK Park, BK Ju, DS Jeong, and I Kim, "Enhanced analog synaptic behavior of SiN x/a-Si bilayer memristors through Ge implantation," NPG Asia Materials, 12, 1, 1-13, 2020

  28. T Kim, H Son, I Kim, J Kim, S Lee, JK Park, JY Kwak, J Park, and YeonJoo Jeong, "Reversible switching mode change in Ta2O5-based resistive switching memory (ReRAM)," Scientific Reports, 10, 11247, 2020

  29. SH Lee, J Moon, YeonJoo Jeong, J Lee, X Li, H Wu, and Wei D. Lu, "A Quantitative Dynamic TaOx Memristor/RRAM model," ACS Applied Electronic Materials, 2, 3, 701-709, 2020

  30. SK Kim, DM Geum, HR Lim, JH Han, H Kim, YeonJoo Jeong, and S Kim, "Photo-responsible Synapse for Artificial Vision Sensors using Ge Synaptic Transistors and GaAs Photodetectors," IEEE Electron Device Letters, 41, 4, 605-608, 2020

  31. Seong Kwang Kim, YeonJoo Jeong, P. Bidenko, HR Lim, YR Jeon, H Kim, YJ Lee, DM Geum, JH Han, C Choi, H Kim, and S Kim, "3D Stackable Synaptic Transistor for 3D Integrated Artificial Neural Networks," ACS Applied Materials & Interfaces, 12, 6, 7372-7380, 2020

  32. YeonJoo Jeong*, Jihang Lee*, John Moon, Jong Hoon Shin, and Wei D. Lu, “K-means Data Clustering with Memristor Networks,” Nano Letters, vol. 18, 7, pp. 4447-4453, 2018

  33. M. A. Zidan*, YeonJoo Jeong*(equally contributed), Jihang Lee, Bing Chen, Shuo Huang, Mark J. Kushner, and Wei D. Lu, “A General Memristor-Based Partial Differential Equation Solver,” Nature Electronics, vol. 1, pp. 441-420, 2018

  34. YeonJoo Jeong, Mohammed Zidan, and Wei D. Lu, “Parasitic Effects Analysis in Memristor Array-Based Neuromorphic Systems,” IEEE Transactions on Nanotechnology, vol. 17, 1, pp. 184-193, 2018

  35. YeonJoo Jeong and Wei D. Lu, “Neuromorphic Computing Using Memristor Crossbar Networks: A Focus on Bio-Inspired Approaches,” IEEE Nanotechnology Magazine, vol. 12, 3, pp. 6-18, 2018

  36. M. A. Zidan, YeonJoo Jeong, Jong Hoon Shin, Chao Du, and Wei D. Lu, “Field-Programmable Crossbar Array (FPCA) for Reconfigurable Computing, IEEE Transactions on Multi-Scale Computing Systems, 2018. DOI: 10.1109/TMSCS.2017.2721160

  37. M. A. Zidan, YeonJoo Jeong, and Wei D. Lu, “Temporal Learning using Second-Order Memristors,” IEEE Transactions on Nanotechnology, vol. 16, 4, pp. 721-723, 2017

  38. X. Zhu, C. Du, YeonJoo Jeong, and Wei D. Lu, “Emulation of synaptic metaplasticity in memristors,” Nanoscale, vol. 9, 1, pp. 45-51, 2017

  39. YeonJoo Jeong, Sungho Kim, and Wei D. Lu, “Utilizing multiple state variables to improve the dynamic range of analog switching in a memristor,” Applied Physics Letters, 107, 173105, 2015

  40. YeonJoo Jeong, Kousuke Miyaji, Takuya Saraya, and Toshiro Hiramoto, “Silicon nanowire n-type metal-oxide-semiconductor field-effect-transistor and single-electron transistor at room temperature under uniaxial tensile strain,” Journal of Applied Physics, vol. 105, 084514, 2009

  41. T. Hiramoto, J. Chen, YeonJoo Jeong, and T. Saraya, “Transport in Silicon Nanowire Transistors,” ECS Transactions, vol. 18.1, pp. 55-60, 2009

International Conferencee

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  1. ​JH Shin, YeonJoo Jeong, M. A. Zidan, Q. Wang, and Wei D. Lu, “Hardware Acceleration of Simulated Annealing of Spin Glass by RRAM Crossbar Array,” in IEDM Tech. Dig. (2018), San Francisco, USA.

  2. Jihang Lee, YeonJoo Jeong, and Wei D. Lu, “Controlling Ionic Transport in RRAM for Neuromorphic Computing Applications,” in Non-Volatile Memory Technology Symposium (2017), Aachen, Germany, N-03.

  3. Mohammed Zidan, YeonJoo Jeong, and Wei D. Lu, “Hybrid Neural Network using Binary RRAM Devices,” in IEEE/ACM International Symposium in Nanoscale Architectures (2017), Newport, USA, pp. 81-82.

  4. Wen Ma, Fuxi Cai, Chao Du, YeonJoo Jeong, Mohammed Zidan, and Wei D. Lu, “Device nonideality effects on image reconstruction using memristor arrays,” in IEDM Tech. Dig. (2016), San Francisco, USA, pp. 16.7.1-16.7.4.

  5. YeonJoo Jeong and Wei D. Lu, “Memory and Neuromorphic Computing Applications Based on Resistive Switching Devices,” in 5th Memristor and Memristive Symposium (2016), Dresden, Germany.

  6. YeonJoo Jeong, Ilchaek Kim, Dae Hwan Yoon, Hyunyoung Shim, Myoung Kwan Cho, Kun-Ok Ahn, and JinWoong Kim, “An Investigation on GIDL Mechanism of Program Disturbance in Sub-20nm NAND Flash Memory,” in SSDM (2013), Tokyo, Japan, pp. 524-525.

  7. SungPyo Lee, YeonJoo Jeong, Hyunyoung Shim, Hironobu Nakao, Myoung Kwan Cho, Kun-Ok Ahn, Gihyun Bae, and Sungwook Park, “The Influence of Wafer Warpage(stress) on P/E Cycling and Retention Characteristics in NAND Flash,” in Materials Research Society (2012), San Francisco, USA.

  8. YeonJoo Jeong, Sangjo Lee, Sunghoon Cho, Pyunghwa Kim, Milim Park, SungPyo Lee, Hyunyoung Shim, Myoung Kwan Cho, Kun-Ok Ahn, Gihyun Bae, and Sungwook Park, “A Investigation of E/W Cycle Characteristics for 2y-nm MLC NAND Flash Memory Devices,” in Proc. Int. Memory Workshop (2012), Milan, Italy, 6213619.

  9. Byoung Deok Jo, YeonJoo Jeong, Ji Yul Park, Pyoung Hwa Kim, Seong Jo Park, Myoung Kwan Cho, Kun-Ok Ahn, and Yohwan Koh, “The Evaluation Method and Characteristics of IPD layer in TLC (Triple Level Cell) NAND Flash,” in SSDM (2010), Tokyo, Japan.

  10. Milim Park, Sukkwang Park, Seokwon Cho, Dong-Kyu Lee, YeonJoo Jeong, Chonga Hong, Ho Seok Lee, Myoung Kwan Cho, Kun-Ok Ahn, and Yohwan Koh, “NAND Flash Reliability Degradation Induced by HCI in Boosted Channel Potential,” in IEEE Int. Reliability Physics Symposium (2010), Anaheim, USA, pp. 975-976.

  11. YeonJoo Jeong, Sukkwang Park, Myoung Kwan Cho, Kun-Ok Ahn, and Yohwan Koh, “The Operation Algorithm for Improving the Reliability of TLC (Triple Level Cell) NAND Flash,” in Flash Memory Summit (2010), Santa Clara, USA.

  12. Sukkwang Park, YeonJoo Jeong, Myoung Kwan Cho, Kun-Ok Ahn, and Yohwan Koh, “Geometry and Operation scheme for Reliable 3-bits NAND,” in Flash Memory Summit (2010), Santa Clara, USA.

  13. Yunbong Lee, Byoungjun Park, DaeHwan Yun, YeonJoo Jeong, Pyoung Hwa Kim, Ji Yul Park, Haechang Yang, Myoung Kwan Cho, Kun-Ok Ahn, and Yohwan Koh, “The Challenges and limitations on Triple Level Cell Geometry and Process beyond 20nm NAND Flash Technology,” in Proc. Int. Memory Workshop (2010), 5488388.

  14. Ryota Suzuki, YeonJoo Jeong, Takuya Saraya, and Toshiro Hiramoto, “Automatic Characteristics Control of Single-Electron Transistors in Collaboration with CMOS Digital Circuits,” in IEEE Silicon Nanoelectronics Workshop (2009), Kyoto, Japan, pp. 35-36.

  15. YeonJoo Jeong, Jiezhi Chen, Takuya Saraya, and Toshiro Hiramoto, “Uniaxial Strain Effects on Silicon Nanowire pMOSFET and Single-Hole Transistor at Room Temperature,” in IEDM Tech. Dig. (2008), San Francisco, USA, pp. 761-764.

  16. YeonJoo Jeong, Kousuke Miyaji, and Toshiro Hiramoto, “Experimental Study on Silicon Nanowire nMOSFET and Single-Electron Transistor at Room Temperature under Uniaxial Tensile Strain,” in IEEE Silicon Nanoelectronics Workshop (2008), Honolulu, USA, M0930.

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